Emulation systems are utilized by hardware and software engineers to assist in the development of microprocessor based systems. Emulation systems typically include a processor-specific board, a cable for connection to a target system and various analysis units. The functional, timing and electrical signal characteristics of the emulator should match those of the microprocessor which will eventually control the target system. The tasks facilitated by an emulator include software debug, hardware debug, and hardware and software integration. These tasks can be implemented using emulator features such as program loading and execution, run/stop controls, memory display and modification, global and local symbols display, internal resource display and modification, analysis, program stepping, resource mapping, memory characterization, breakpoint generation and clock source selection. An important function of emulation systems is analysis of processor operation. Typically, the emulator is connected to the processor bus and analyzes operation by monitoring each processor bus cycle in which the processor communicates with memory and other devices.
Virtual memory systems were developed in response to large computer programs and multitasking computer systems. As programs became larger, the memory that is directly accessible by the processor could no longer contain the entire program and its data. In multitaskinq systems, several programs may be active at once, with the CPU being time shared between programs. Virtual memory systems permit execution of large programs and multitasking in a physical memory of practical size.
Virtual memory systems manage physical memory by allocating a large virtual, or logical, address space to physical memory as needed. Portions of the logical address space may be transferred to a mass storage device, such as a disk, and are activated in physical memory when needed. The CPU executes programs in the logical address space. A memory management unit cooperates with the operating system to translate logical addresses requested by the execution unit of the CPU into physical addresses. When a logical address is not located in the physical address space, a portion of the logical address space must be activated in main memory. Both logical addresses and physical addresses are grouped into pages which may contain a selected number of bytes. Data is transferred between physical memory and a mass storage device in pages. In other virtual memory systems, the entire logical address space is contained in physical memory, and a mass storage device is not required.
The relation between logical addresses and physical addresses in a virtual memory system is controlled by a memory management unit. The translation between logical addresses and physical addresses is specified by a table structure. A logical address requested by the execution unit is translated by the memory management unit into a physical address which is then used to access a location in physical memory.
In order to improve the operating speed of microprocessors, memory management units have been placed on the same chip, or integrated circuit, with the unit which executes programs in the logical address space. This configuration minimizes the time from the generation of the logical address to generation of the corresponding physical address. An example of such a processor is the MC68030 manufactured and sold by Motorola, Inc. The MC68030 microprocessor utilizes a demand paged memory management unit in which logical address to physical address translations are determined only as they are requested by the executing program.
In order for an emulation system to analyze the execution of a program, it is necessary for the state analyzer portion of the emulation system to know the logical addresses being accessed. The logical addresses can be related to the absolute and symbolic values of the original source code written by the user. However, when the microprocessor contains an on-chip memory management unit, only the physical addresses are available at the pins of the processor chip. The physical addresses do not provide the state analyzer with the information necessary to analyze program execution. Thus, it has been difficult to monitor and analyze the operation of microprocessors having on-chip memory management units.
It is a general object of the present invention to provide improved systems for analyzing the operation of microprocessors.
It is another object of the present invention to provide methods and apparatus for translating physical addresses provided by a memory management unit to logical addresses.
It is a further object of the present invention to provide methods and apparatus for determining logical addresses by monitoring table searches used by a processor for translating logical addresses to physical addresses.
It is a further object of the present invention to provide methods and apparatus for translating physical addresses provided by a memory management unit associated with a processor to logical addresses in real time during execution of a program by the processor.